Thematic Programs

International Workshop : Spintronics VLSI



November 20, 2015 – November 21, 2015


Conference Room, Laboratory for Nanoelectronics and Spintronics, Tohoku University
(2-1-1 Katahira, Aoba, Sendai, Miyagi 980-8577 Japan)
Map】 The building is shown as "E04" in the map.

Confirmed invited speakers

  • Seung H. Kang (Qualcomm)
  • Sechung Oh (Samsung Electronics)
  • Yiming Huai (Avalanche)
  • Kang L Wang (UCLA)
  • Hiroaki Yoda (Toshiba)
  • Ricardo C. Sousa (Spintec)
  • Koji Nii (Renesas Electronics)
  • Takahiro Hanyu (Tohoku University)
  • Hiroki Koike (Tohoku University)


The workshop is free of charge. Those who would like to participate in the workshop should register on the TFC website.


Tetsuo Endoh
(Director, Center for Innovative Integrated Electronic Systems, Tohoku University)

Hideo Ohno
(Professor, Research Institute of Electrical Communication, Tohoku University)

Time Schedule

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Friday, November 20
14:00 – 14:20
Hideo Ohno (Tohoku University)
Opening remarks
Chair: Tetsuo Endoh (Tohoku University)
14:20 – 15:00
Kang L Wang (UCLA)
Invited talk 1: Low Dissipation Spin-Orbitronics Systems
15:00 – 15:40
Hiroaki Yoda (Toshiba)
Invited talk 2: The Progresses of MRAM, the Effect on Energy saving, and The Key to it
15:40 – 16:10
Group Photo & Break
Chair: Tetsuo Endoh (Tohoku University)
16:10 – 16:50
Yiming Huai (Avalanche)
Invited talk 3: Fully Functional 64Mb pMTJ STT-MRAM Chips on 300mm Wafers
16:50 – 17:30
Sechung Oh (Samsung)
Invited talk 4: Recent advances of STT-MRAM for emerging memory Devices
Saturday, November 21
Chair: Takahiro Hanyu (Tohoku University)
10:30 – 11:10
Koji Nii (Renesas Electronics)
Invited talk 5: Overview of embedded SRAM/DRAM, and prospect of STT-MRAM technology for advanced SoC solutions
11:10 – 11:50
Seung H. Kang (Qualcomm)
Invited talk 6: Emergence of STT-MRAM as a Unified Embedded Memory for Internet-of-Things
11:50 – 14:00
Chair: Takahiro Hanyu (Tohoku University)
14:00 – 14:40
Hiroki Koike (Tohoku University)
Invited talk 7: High-Density and Low-Power Applications of Spintronics Circuits: High-Density 1T1MTJ-MRAM Array Design, and Low-Power 4T2MTJ-MRAM-based Pattern Recognition Processor
14:40 – 15:20
Ricardo C. Sousa (Spintec)
Invited talk 8: MRAM for hybrid CMOS/Magnetic electronics:perpendicular anisotropy and integrated logic concepts
Chair: Tetsuo Endoh (Tohoku University)
15:20 – 16:00
Takahiro Hanyu (Tohoku University)
Invited talk 9: Spintronics-Based Logic-in-Memory Architecture Towards Dark Silicon Era


16:00 – 16:10
Tetsuo Endoh (Tohoku University)
Closing remarks